This paper evaluates the performance of Spin-Torque Transfer Random Access Memory (STT-RAM) basic memory cell configurations in 45nm hybrid CMOS/MTJ process. Switching speed and current drawn by the cells have been calculated and compared. Cell design has been done using cadence tools. The results obtained show good agreement with theoretical results.
@artical{k332014ijsea03031004,
Title = "Design of STT-RAM cell in 45nm hybrid CMOS/MTJ process",
Journal ="International Journal of Science and Engineering Applications (IJSEA)",
Volume = "3",
Issue ="3",
Pages ="49 - 52",
Year = "2014",
Authors ="Karrar Hussain, Dr. C V Krishna Reddy, Dr. K Lal Kishore, "}
10.7753/IJSEA0303.1004
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